Testing is an important step in the process of manufacturing semiconductor devices, especially those which are digital in nature. Typically, such semiconductor devices are often tested by first supplying successive test vectors to the device and then capturing the response signal generated by the device upon receipt of each test vector. By analyzing the response signals, the operation of each semiconductor device can be verified. If faults are discovered, then appropriate steps can be taken to adjust the manufacturing process to eliminate the faults in subsequently made semiconductor devices.
In practice, the test vectors are coupled to, and the response signals are recovered from, each semiconductor device under test through a test fixture designed for this purpose. A typical fixture comprises a substrate having a plurality of centrally located test points arranged the same as the conductive members on the device for making contact therewith when the device is placed on the fixture. Depending on the configuration of the conductive members of the device, the test points may take the form of metal-plated through holes or metallized areas. Near the periphery of the substrate is a plurality of probe points, each connected to a separate channel of a conventional testing machine which serves to supply the test signals to, and recover the response signals from, the device under test.
Each test point is connected to one of the probe points via a conductive path, typically, a metallized strip on the upper surface of the substrate. In the case where the substrate is comprised of multiple layers, each path may take the form of a combination of metallized strips, each strip lying on a separate one of the layers and being connected to a strip on an adjacent layer by a plated through-hole (via). Alternatively, although less desirable, the paths could each take the form of individual wires soldered to the test points and probe points.
In the past, the process of routing, that is, laying out, the paths between the test points and probe points has been done manually, on an ad hoc basis. For fixtures which have a large number of probe points and test points, the process of routing the paths is extremely burdensome, especially if obstacles such as screw holes in the substrate are to be avoided. Since each test fixture is specific for a particular type or code of semiconductor device, when a new semiconductor device must be tested, a new fixture is usually required. In many semiconductor manufacturing facilities, there is a constant need for new test fixtures.
In U.S. Pat. No. 4,642,890, issued on Feb. 17, 1987, to C. D. Hechtman et al., and assigned to AT&T Technologies, there is disclosed a method for routing conductive paths between each of a first and second family of points on a body, such as a test fixture. As described in the Hechtman et al. patent, an electrostatic analog is employed to establish a set of paths which link arbitrary pairs of the two families of points. Unfortunately, the technique described in this patent incurs the disadvantage that paths cannot readily be routed between particular pairs of the two families of points. Thus, a test fixture which requires that a selected pair of points be linked must still be routed manually.
Thus, there is a need for a technique for efficiently routing conductive paths on a test fixture between selected pairs of test points and probe points.